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Washington, June 14 (ANI): University of Michigan researchers have developed a low-power microchip that uses 30,000 times less power in sleep mode, and 10 times less power in active mode, as compared to the chips that are already available on the market.

Measuring one square millimetre, the Phoenix Processor sets a low-power record with extreme sleep mode.

Experts behind this invention have revealed that the chip is intended for use in sensor-based devices such as medical implants, environment monitors or surveillance equipment.

They say that the chip consumes just 30 picowatts (1picowatt = one-trillionth of a watt) during sleep mode.

The researchers theorise that the energy stored in a watch batter might just be enough to run the Phoenix for 263 years.

David Blaauw, a professor in the Department of Electrical Engineering and Computer Science, says that one reason why the realisation of this chip a major achievement is the fact that it is of the same size as its thin-film battery.

In most cases, he says, batteries are much larger than the processors they power, drastically expanding the size and cost of the entire system.

“Low power consumption allows us to reduce battery size and thereby overall system size. Our system, including the battery, is projected to be 1,000 times smaller than the smallest known sensing system today. It could allow for a host of new sensor applications,” Blaauw said.

He even revealed that a team of university researchers is studying whether or not a biomedical sensor fitted with the Phoenix Processor could help monitor eye pressure in glaucoma patients.

The researcher believe that chips like this may one day power a robust pacemaker that could take more detailed readings of a patients health.

The makers of Phoenix say that to achieve such low power, they focussed on sleep; mode, where sensors can spend more than 99 per cent of their lives.

“Sleep mode power dominates in sensors, so we designed this device from the ground up with an efficient sleep mode as the No. 1 goal. That’s not been done before,” said Dennis Sylvester, an associate professor in the Department of Electrical Engineering and Computer Science.

Phoenix engineers say that they used much narrower power gates that restrict the flow of electric current.

They say that the strategy, coupled with the deliberate use of an older process technology, cut down on energy leaks.

Scott Hanson, a doctoral student in the U-M Department of Electrical Engineering and Computer Science who jointly leads this project with another doctoral student named Mingoo Seok, will present the design June 20 at the Institute of Electrical and Electronics Engineers’ Symposium on VLSI Circuits. (ANI)